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Automotive Chip Design
EV Powertrain Electronics
Long-cycle design programs where IP, foundry, and ecosystem partnerships execute against tapeout and market windows.
Example organizations in this space:
Infineon
NXP
Texas Instruments
STMicroelectronics
This interactive experience is the shipped product itself — the same application code customers run in production, mounted read-only in your browser over a real sample journey. Not a video, not a mockup: because the demo and the product are one codebase, it can never drift from the real thing.
Inside this journey
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Pre-Sales
Qualify program fit and map stakeholders, timelines, and mandatory qualification requirements before detailed evaluation.
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Fit & Program Qualification
Confirm decision timeline, procurement constraints, sample needs, and whether a formal multi-stage qualification program is required before investing in detailed discovery.
Qualification Questions
Fit & Program Qualification
- To make best use of your time, will your evaluation require a formal multi-stage qualification program before we invest in detailed discovery?
- Roughly what sample quantities do you need to start qualification (per variant)?
- Are there procurement or technical compliance requirements we should meet (select all that apply)?
- Are there timing or contract constraints in procurement that would affect whether we proceed to a full discovery (briefly describe)?
Budget
- Is there an allocated budget or budget range for component selection and qualification for this program?
- If comfortable sharing, what budget range or procurement channel expectations will influence supplier selection?
Authority
- Who is the decision owner for component selection and which roles influence final approval? (roles only)
Timeline
- What is your target decision window for selecting a component supplier?
- What milestone or event is driving that timing (briefly)?
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Technical Discovery
Map electrical, thermal, EMC, and functional-safety constraints together with stakeholder roles, target acceptance tests, and project timelines.
Discovery Questions
Quick technical snapshot
- How often does your team start a new traction inverter, onboard charger, or BMS design cycle?
- Which of these device types are in your active roadmap right now
- Tell me about your typical decision timeline from initial technical evaluation to production release
- Who are the technical and procurement stakeholders that must sign off on semiconductor component selection for a platform
- When you select a semiconductor supplier for a long-life vehicle program, which evidence items are nonnegotiable
Where architecture decisions push schedule risk
- If a 2 percentage-point improvement in switching loss could reduce heatsink size and cut cost, would you prioritize swapping the gate driver now or defer it to later in development
- Describe your current power-stage topology, including half-bridge, full-bridge, or multi-level choices and their nominal DC link voltages
- Which switching frequency ranges and dead-time approaches are you targeting across this platform
- Who owns gate-charge and thermal co-optimization on your team, and who is the escalation contact if performance gaps appear
- Walk me through a recent design decision where a component choice forced firmware rework or changed your validation plan
- What single component or parameter risk in the power stage would stop the program from advancing to prototype build
Thermal reality versus lab assumptions
- Quantify the continuous RMS current and peak duty cycle your inverter must sustain in your worst-case drive cycle
- Tell me about the cooling approach you assume in system-level thermal models, convection, liquid cooling, or a hybrid solution
- How many thermal simulation iterations and hardware runs have you completed against your reference design in the last 12 months
- Walk me through the last thermal test that required rework, what failed, and how long it took to recover
- What would have to change about your thermal budget to avoid a late-stage heatsink redesign that costs program months
- Estimate the manufacturing or program cost impact if you had to derate modules by 10 percent across first-year production
EMC, emissions, and lab surprises
- If your conducted or radiated emissions exceed vehicle class limits at the first lab run, who owns the mitigation plan and what is the typical mitigation budget you can approve
- List the EMC standards and vehicle emission classes that are mandatory for your platform and those that are optional
- Describe layout or harness choices that you have found most sensitive to EMC failures, for example specific trace routing, connector placement, or shielding approaches
- Identify the team responsible for validating software-controlled switching patterns and the sign-off owner for firmware changes that affect emissions
- What single EMC test outcome would force a delay in production validation and require PCB or module rework
- How often do you run pre-compliance EMC scans during development and at what stage do you first engage full validation labs
Safety first, and the cost when it breaks
- When a functional-safety claim fails in validation, estimate the magnitude of program delay, rework, or regulatory exposure you expect
- Detail the ASIL level allocations you plan for traction, motor-control, and battery subsystems and any deviations from ISO 26262 recommendations
- Have you defined a diagnostics and fault-handling strategy that maps to your safety requirements and documented required failure modes
- Give a recent example of a fault injection or HIL run that revealed a safety gap and the immediate corrective actions taken
- Identify one missing artifact that would cause auditors to fail your functional-safety audit
- Is there a named internal owner responsible for maintaining safety evidence and traceability across software and hardware
Obstacles that silently extend timelines
- Why do projects of similar scope at your company tend to slip past their target launch dates
- List the three most common root causes you encounter, for example supplier lead times, lab bottlenecks, or late safety changes
- How many full prototype iterations do you budget for in the qualification phase and what fraction typically require redesign
- Explain the most recent vendor or supply disruption that changed your component roadmap and how you adapted
- What would have to be true about your lab access and tooling for you to commit to a six-month accelerated qualification path
- Do you have contingency plans to move critical testing to alternate labs if primary test facilities are unavailable
The other options on your table
- Name the incumbent suppliers and internal teams you are weighing against an external semiconductor partner, and note which option currently holds largest share
- Under what conditions would your current in-house approach be sufficient to remain with it rather than change vendors
- Has anyone on your team proposed a full internal redesign to avoid partnering with an external semiconductor supplier, and if so what is the estimated timeline and cost
- What strengths do you see in the incumbent or internal option that make your team hesitant to switch
- Assume the incumbent met the three criteria you value most, would you still consider a change and why
Readiness and practical gating conditions
- How prepared is your team to provide the integration dependencies below, and which missing dependency would stop lab testing entirely
- Do you already own vehicle-level harness and connector documentation, or will that need to be provided by an assembly partner
- Name the team that controls the firmware APIs and measurement endpoints that a seller reference firmware will need to integrate with
- Is access to your vehicle or system testbeds available for vendor-led bench validation within your target timeline
- Estimate the number of dedicated engineers and test technicians you can allocate to a joint evaluation program during the next 6 months
- Are there regulatory approvals, export controls, or corporate sign-offs that must be completed before samples or lab testing
- Specify the manufacturing or test tool dependencies required before a successful demo, for example high-voltage dynos, environmental chambers, or ATE fixtures
Acceptance criteria that let us move fast
- Assuming the pilot demonstrates the required efficiency and safety outcomes, what would prevent you from signing the supply and qualification agreement within 4 weeks
- Specify the measurable performance indicators you require for initial bench acceptance, for example switching loss per module, junction temperature rise, or fault-detection latency
- What test sequence and sample quantities do you require for a type-approval style validation run
- Provide an acceptable range for switching efficiency improvement per module that would be considered a win versus your incumbent
- Provide the title or role that has final sign-off authority for production release
- Suppose acceptance tests pass but supply lead times exceed forecasts, which risk mitigations would you accept to keep your launch date
Next steps and reasonable timelines
- Assuming the seller can deliver validation samples in 2 weeks, would that change your commitment timeline
- Share a realistic calendar for the key milestones you need before production sign-off, including sample receipt, bench validation, HIL, and supplier audits
- How quickly can your procurement and contract teams turn around an NDA and sample order once technical acceptance is achieved
- Share the name and role of the day-to-day point of contact and the executive sponsor who can clear budget or timeline blockers
- Are there budget gates or board reviews scheduled that could block commercial commitments even if technical acceptance is met
- What immediate actions would you expect the seller to take in the first 30 days after mutual commit to ensure milestones are met
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Design Integration Review
Walk through how the device portfolio and reference designs address the buyer's switching, thermal, EMC, and functional-safety outcomes in real system scenarios.
Solution Experience
- Design Integration Review
- Confirm the current state and its cost
- You confirm the demonstrated device and reference-design evidence addresses your switching and thermal acceptance criteria for the shown scenarios.
- Provide a tailored evidence packet mapping device measurements to your acceptance tests within 7 days.
- You confirm whether EMC margins and proposed mitigations meet your system-level targets or require additional layout or filter work.
- Map switching and thermal outcomes to your scenarios
- Provide three representative system scenarios with operating points and the exact acceptance thresholds for switching, thermal, EMC, and safety.
- Review EMC margins and mitigation evidence in reference designs
- Schedule a bench test window and reserve the reference-design test fixture to reproduce the agreed scenarios.
- You confirm the functional-safety diagnostics and failure-mode evidence map to your ISO 26262 acceptance tests.
- Validate functional-safety diagnostics and failure modes
- You agree on the remaining evidence, timeline, and ownership required to close gaps before qualification milestones.
- Deliver an itemized list of any layout or filter changes needed to meet EMC margins and an estimate of their impact on timeline.
- Walk one or two buyer scenarios end-to-end with real data
- Validate this maps to what you meant
- Agree next steps and evidence owners
- Design Integration Review
- Design Integration Review Deck
- Design Integration Brief
- meeting
- slides
- document
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Hands-on Evaluation & Bench Testing
Validate component performance against the buyer's acceptance criteria including switching efficiency, thermal limits, EMC behavior, and safety diagnostics through lab and bench tests.
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Solution Scope
Define product variants, reference-design deliverables, qualification milestones, responsibilities, and measurable acceptance tests for design-in and production readiness.
Scope Configuration
- Supply Automotive-Grade Isolated Gate Drivers
- Supply High-Voltage Power Management ICs (up to 800V)
- Deliver Motor Control Microcontroller Units
- Provide Battery Management Front-End ICs
- Deliver SiC and IGBT Evaluation Boards
- Provide Traction Inverter Reference Hardware
- Provide Onboard Charger Reference Hardware
- Provide BMS Reference Design and Evaluation Kit
- Deliver Thermal Simulation Models and CAD Files
- Provide EMC-Optimized PCB Layout and Filter BOM
- Provide Functional Safety Package up to ASIL-D
- Deliver Automotive Qualification Test Reports (AEC-Q100/AEC-Q101)
- Deliver Motor Control Reference Firmware and Example Code
- Provide Gate Driver Protection and Diagnostics Firmware
Scope Questions
Supply Automotive-Grade Isolated Gate Drivers
- Specify the DC bus voltage(s) your traction or auxiliary inverter will use (e.g., 400 V, 800 V)
- List the peak switching current and continuous current targets for the gate driver interface to SiC or IGBT modules (A)
- Do you require reinforced galvanic isolation with a specified creepage/clearance target for module-level certification?
- Identify the package and thermal mounting constraints for your PCB footprint (e.g., DCB area, thermal vias per pad)
- Provide the functional protection features you need in the gate driver IC (e.g., desaturation detection, active Miller clamp, undervoltage lockout)
Supply High-Voltage Power Management ICs (up to 800V)
- Specify the primary power-management roles you need the IC to perform (e.g., high-voltage startup sequencing, isolated supplies, precharge control)
- List the maximum steady-state and transient junction temperature (Tj) targets your system allows for the PMIC and adjacent components
- For the PMIC, indicate required certification or tests beyond AEC-Q (e.g., ISO 16750 environmental tests, LV124/EV-specific soak profiles)
- Identify the expected topology and loads the PMIC must support (e.g., isolated flyback for gate-drive bias, synchronous buck for 12 V bus)
- Provide target electrical thresholds for the PMIC (e.g., start-up voltage, hold-up time, inrush current limit)
Deliver Motor Control Microcontroller Units
- Specify the motor type and control algorithm you will implement (e.g., permanent magnet synchronous motor (PMSM) with field-oriented control (FOC), induction motor with V/f)
- Name the real-time peripheral and ADC performance requirements for rotor position and current sensing (e.g., sample rate kS/s per channel, ADC resolution bits)
- Describe the safety and isolation interfaces required between the MCU and high-voltage power stage (e.g., ISO 26262 diagnostics, galvanic isolation barriers)
- Indicate the required functional-safety support from the MCU (diagnostic coverage, fail-safe states, FMEDA inputs)
- Provide expected memory and communication interfaces needed on the MCU for integration (e.g., CAN FD, Automotive Ethernet, SPI to gate drivers)
Provide Battery Management Front-End ICs
- Specify cell chemistry and configuration the front-end must support (e.g., NMC cells, 96 series cells, individual cell monitoring)
- List required measurement accuracy and sampling rate for cell voltage and temperature monitoring (mV, °C, samples/sec)
- Identify the balancing strategy expected (passive bleed, active balancing with specified mA target)
- Provide the allowed common-mode voltage range and isolation requirements for BMS front-end signals
- Describe required integration endpoints for telemetry and safety interlocks (e.g., CAN signal IDs, contactor drive requirement)
Deliver SiC and IGBT Evaluation Boards
- Specify the power module(s) or discrete device footprints the evaluation board must host (e.g., SiC MOSFET half-bridge module outline, IGBT pack part family)
- Indicate the bench-test scenarios you plan to run on the evaluation board (e.g., switching-loss measurement at X A and Y V, short-circuit withstand test duration)
- Identify required connectors and measurement access points on the board (e.g., Kelvin sensing points, Rogowski coil mount, scope probe headers)
- Describe the thermal interface expectations for module cooling on the eval board (e.g., cold plate mounting, thermal sensor placement, max Tj allowed)
- Provide the acceptance threshold that will confirm the evaluation board is fit for your switching-loss and EMC bench tests (e.g., measured switching loss within ±10% of reference at specified operating point)
Provide Traction Inverter Reference Hardware
- Specify target inverter continuous and peak output power (kW) and nominal DC bus voltage the reference hardware must demonstrate
- List the real-world drive cycles or torque profiles the reference inverter should be validated against (e.g., sustained highway cruise, cold-start acceleration, urban stop-start)
- Identify the target motor interface and sensing expected (e.g., resolver, Hall sensors, sensorless FOC with estimated rotor observer)
- State the mechanical and thermal integration artifacts required (e.g., mechanical mounting drawing, coolant flow and max delta-T requirements)
- What acceptance criteria will confirm the traction inverter reference hardware meets design-in and production readiness (define measurable tests such as sustained 50% overload for X minutes, thermal run-away threshold, and EMC radiated emission limits)
Provide Onboard Charger Reference Hardware
- Specify maximum input AC voltage and charging power targets the onboard charger reference must support (e.g., 11 kW, 22 kW, three-phase)
- List the required grid-interface functions (e.g., power factor correction (PFC) standard, anti-islanding detection, EVSE communication protocol)
- Identify cooling approach and temperature rise limits the charger hardware must meet during continuous operation
- Describe required safety interlocks and isolation coordination with BMS (e.g., contactor sequencing, isolation-monitoring thresholds)
- Provide the expected test fixtures or rack interfaces you will use to validate the charger reference hardware (e.g., AC source rating, cooling loop, measurement channels)
Provide BMS Reference Design and Evaluation Kit
- Specify the cell-count range and pack architectures the BMS kit must support (e.g., 48S, 96S, modular stackable boards)
- List the diagnostics and telemetry endpoints required in the BMS reference (e.g., SOC algorithm export, cell mismatch report, CAN signals and message IDs)
- Identify the expected balancing throughput and balancing-power targets the evaluation kit should demonstrate
- Describe thermal monitoring and recommended sensor placement on the pack the reference design should include (e.g., NTC locations, max ambient for derating)
- Provide integration checkpoints you require before accepting the BMS kit for system-level testing (e.g., CAN message conformance, safe-state verification, bootloader and firmware baseline)
Deliver Thermal Simulation Models and CAD Files
- Specify which simulation formats you need (e.g., ANSYS thermal model, SPICE-level power loss maps, STEP CAD files for mechanical integration)
- List the thermal boundary conditions and cooling scenarios you want included (e.g., forced liquid cooling at X L/min, ambient 85°C soak, closed-loop coolant)
- Identify any required validation points and measured telemetry for model correlation (e.g., junction thermocouple locations, case-to-coolant delta-T targets)
- Describe the level of CAD detail required for system-level integration (e.g., connector locations, mounting bosses, harness channels)
- Indicate preferred file delivery and version control method for models and CAD (e.g., Git LFS, PLM export, STEP archives)
Provide EMC-Optimized PCB Layout and Filter BOM
- Specify the EMC standard and class you must meet for the vehicle subsystem (e.g., CISPR 25 class 5 radiated emissions)
- List the critical layout constraints we must honor (e.g., power-loop area, star grounding, placement of common-mode chokes)
- Identify required filter performance and BOM constraints (e.g., allowed inrush, differential-mode attenuation at X MHz, component temperature derating)
- Describe test harness and probe points needed to validate EMC behavior on bench (e.g., LISN placement, current probe locations, harness length constraints)
- Indicate whether you require layout rule files for your PCB tool (e.g., ODB++ or Gerber layer rules) and preferred format
Provide Functional Safety Package up to ASIL-D
- Specify the safety goals and target ASIL level(s) you will assign to powertrain functions using these parts (e.g., motor torque-limiting at ASIL-D, charging interlock at ASIL-B)
- Identify the FMEDA and diagnostic-coverage evidence you require for the device to support your system ASIL claim (specify target DC and SFF thresholds)
- List expected deliverables in the safety package (e.g., safety manual, failure-mode tables, safety-related diagnostic test procedures)
- Indicate the format and sign-off authority you need for safety artifacts to accept them into your ISO 26262 safety file (e.g., certified PDF, traceability matrix)
- What evidence will validate the device-level safety claims required for your ASIL-D element (e.g., measured diagnostic response time, demonstrated fail-safe transitions under specified fault injection)
Deliver Automotive Qualification Test Reports (AEC-Q100/AEC-Q101)
- Specify which AEC qualification families you require for each device (e.g., AEC-Q100 for ICs, AEC-Q101 for discrete power devices)
- List the minimum environmental and electrical test cases that must be covered in delivered reports (e.g., temperature cycling X cycles, HAST hours, ESD class)
- Identify any additional OEM or regional qualification protocols we must include (e.g., OEM-specific soak profiles, extended vibration spectra)
- Indicate preferred report artifacts for handover (e.g., raw test logs, consolidated pass/fail summary, signed certificate)
- What acceptance criteria will confirm the delivered qualification reports are sufficient for your production sign-off (define required pass thresholds and required test coverage)
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Mutual Commit
Finalize commercial terms, supply commitments, qualification acceptance criteria, and governance for the long-life production program.
Agreement Modules
- Master Long-Term Supply Agreement
- Order Confirmation
- Qualification Acceptance Agreement
- Forecast & Capacity Commitment
- Pricing, Payment & Escalation Schedule
- Warranty, Returns & Repair Policy
- Program Governance & Escalation Matrix
- Firmware License & Maintenance Agreement
- Quality & Production Readiness Addendum
- Functional Safety & Regulatory Addendum
- Confidentiality & IP Protection Agreement
- Change Order & Engineering Change Notice (ECN) Process
- Supply Risk & Business Continuity Agreement
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Deployment
Operationalize design-in, qualification testing, and production readiness with locked responsibilities and checkpoints.
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Pre-Deployment Readiness
Lock owners, test facilities, sample quantities, firmware baselines, and target qualification timelines required before execution begins.
Pre-Deployment Questions
Environment and site access
- Primary test facility name(s) that will host bench and lab testing (enter each site name exactly as you will use it) — so we can reserve equipment and plan shipments.
- Are the buyer's on-site test facilities approved for high-voltage powertrain testing (up to 800V) and SiC/IGBT power-stage work? — this determines whether vendor engineers must use a seller lab.
- Is site access for vendor staff and engineers already approved (point of contact named), pending, or not available? — needed to schedule onboarding and safety briefings.
Samples and test resources
- Committed sample quantities per test phase (bench evaluation, EMC, reliability): which range does the buyer commit to provide per phase? — used to size test reservations and shipping.
- Who will supply the physical test artifacts required for execution (reference boards, firmware baseline, harnesses, jigs)? Select the factual ownership model — we use this to plan logistics and responsibilities.
- Which lab capabilities must be reserved per site (choose all that apply or list additional capabilities) — examples: EMC chamber, temperature chamber, power cycling bench, high-power dyno.
People and ownership
- Is a single program owner assigned on the buyer side to approve gate readiness and accept qualification results? — this is the person who signs readiness decisions.
- If an owner is assigned (or when assigned), provide the owner's name, role, and explicit decision authority (e.g., approve test results, sign production release) in DeploymentConfig — we need this to route approvals.
- Who owns and will approve the firmware baseline used for qualification (select the factual owner model) — identifies who controls firmware change freeze and approval gating.
Timing and constraints
- What is the readiness state for the target qualification start (first lab test)? — choose the factual schedule state so we can sequence bookings (exact date belongs in DeploymentConfig).
- List any hard blackout windows, plant freeze dates, or compliance deadlines per site that will prevent testing (state the window and site) — we will use these to avoid scheduling conflicts.
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Configuration Details
Capture exact configuration values the teams will use — hardware variants, test setups, measurement thresholds, firmware versions, and integration endpoints.
Configuration Details
Target Hardware & Test Setup
- Enter the hardware variant name used for deployment configurations (single identifier). Example format: TractionBoard-A_v2
- Select the power-stage type used in this configuration
- Nominal system voltage (V). Default 400 — confirm or specify another value
- Enter the test-bench name/ID where bench tests will run (single value; e.g., 'Lab-Bench-3')
- Primary ambient temperature for steady-state thermal tests (°C). Default 85
- Switching-efficiency acceptance threshold for power-stage tests (%) — Default 97.0
- Maximum allowable device junction temperature during qualification tests (°C). Default 175
Firmware, Integration & Ownership
- Firmware baseline version used for qualification (format: vX.Y.Z). Default v1.0.0
- Telemetry ingestion endpoint URL used during qualification (format: https://... ). Leave blank if none
- Integration credential identifier (service-account name or client-id). DO NOT paste secrets; provide the non-secret identifier only
- Who is the credential owner/point-of-contact for the integration (role)
- Secure channel to be used to hand off any secrets/credentials (select one). The secret itself will be exchanged via the chosen secure channel at handoff
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Qualification & Production Launch
Execute qualification testing, sample validation, reliability runs, and ramp plans with clear owners, sequencing, and escalation paths.
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Production Release Sign-Off
Formal acceptance gate that verifies all qualification tests, safety evidence, and supply readiness are met before committing to production launch.
Checklist items
- Receive consolidated qualification test report package
- Confirm all qualification test results meet agreed acceptance criteria
- Obtain functional safety compliance dossier
- Validate final reliability and lifetime testing completion
- Confirm production quality documentation is completed and approved
- Obtain written supply readiness and capacity commitment
- Validate packaging, labeling, and traceability controls
- Lock firmware/software baseline and release artifacts
- Validate production test fixtures and factory test software at the production site
- Confirm plant EHS and energization safety readiness (including LOTO and permits)
- Obtain formal Production Release Authorization
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Success
Track in-production performance, field reliability feedback, and enhancement requests through recurring reviews and a shared issues channel.
Success Reviews
- Go-live Health Check (weeks 1-4)
- First Measurement Review (weeks 4-10)
- Operational Reliability Review (quarterly)
- Functional Safety and Diagnostics Audit (biannual)
- Annual Production Performance Review
Issues & Enhancements
- Deliver an updated safety evidence package including FMEDA and test results within the agreed timeline.
- Open targeted root-cause investigations for items exceeding severity thresholds and record expected completion dates.
- Update the shared issues channel with the revised priority list and next checkpoint dates.
- Safety diagnostics performance
- Confirm functional safety diagnostics remain within Solution Scope thresholds or document required mitigations.
- Agree a firm timeline for any safety-related firmware updates and the verification steps to close the audit findings.
- Update traceability artifacts to reflect the current deployed baseline and audit outcomes.
- Re-confirm acceptance criteria and owners
- Publish the defined emergency patch deployment plan and expected median deployment time.
- Add targeted diagnostic instrumentation to upcoming production lots to improve fault triage data.
- Yearly performance summary
- Document whether annual warranty return rate and MTBF meet the targets recorded in Solution Scope, and record corrective plans for any gaps.
- Capture a parts-obsolescence mitigation plan with timelines and required qualification milestones.
- Confirm the annual governance cadence and update escalation contacts in the shared issues channel.
- Publish the annual reliability report including warranty return calculations and MTBF derivation.
- Create a parts-obsolescence register with recommended replacements and qualification steps.
- Schedule quarterly checkpoints for the next 12 months and update the shared issues channel routing rules.
- All acceptance criteria in Solution Scope have an assigned owner and confirmed acceptance method.
- Critical deployment or configuration blockers are recorded with target resolution dates.
- Schedule and scope for the First Measurement Review are agreed and dated.
- Publish the deployment validation log and confirmed owner list within 48 hours.
- Create remediation tickets for each critical blocker with target resolution dates.
- Circulate the agenda and data requirements for the First Measurement Review.
- Present measured outcomes
- Determine whether average switching efficiency and thermal compliance are trending toward Solution Scope targets and document root causes for any shortfalls.
- Agree a concrete set of remediation actions with dates sufficient to reach the next milestone.
- Confirm the retest schedule and data requirements for verifying remediation effectiveness.
- Deliver updated test run data and a summary of root-cause evidence prior to the retest window.
- Schedule targeted bench tests for identified anomalies and publish test configurations.
- Update the remediation timeline that feeds into the ongoing reliability cadence.
- Production and field performance summary
- Confirm the current field failure rate and mean time to resolve meet or are moving toward Solution Scope targets, or document the remediations required.
- Ensure all high-severity issues have an agreed resolution plan and target date for closure.
- Maintain a prioritized list of enhancement requests tied to production issues for the next quarter.
- Publish the quarterly reliability dashboard with failures-per-million-hours and MTTR calculations.
- Deployment and configuration validation
- Review safety evidence and traceability
- Lifecycle and part-obsolescence review
- Issue burn-down and SLA adherence
- Root-cause diagnosis for any gaps
- Agree corrective actions and timeline
- Enhancement requests and backlog prioritization
- Long-term reliability improvement plan
- Early operational signals
- Emergency response and patching timeline
- Open issue triage
- Mitigation and monitoring plan
- Governance and escalation refresh
- Confirm path to production realization
- Shared issues channel health check
- Agree immediate remediation actions